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BE64 Software
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bulletFeatures
bulletWord Generator
bulletLogic Recorder
bulletStimulus/Response Testing
bulletBus Structured Interface Simulation
bulletNon-bus Structured Interface Simulation
bulletMicroprocessor Bus Emulation
bulletBlock Diagram/Specifications

The BE-64 is a C size VXI card which houses the digital resource required in digital test and troubleshooting applications.

BE-64 FEATURES

bulletSINGLE C SIZE MESSAGE BASED VXI MODULE.
bulletSCPI COMMAND SET
bullet64 I/O CHANNELS X 32 K BITS / CHANNEL
bullet32K I/O memory subdivided into multiple data tables
bulletData rates from DC to 25 Mhz
bullet16 TIMING SETS
bulletEach timing set is defined by a 256 bit x 24 bit memory
bulletTiming sets are docked by a 50, 20 or 10 Mhz (20, 50 or 100 ns resolution) or external dock (50 MHz max.)
bulletEach timing set includes the following:
bullet8 user defined output signals - TSOUT1 thru TSOUT8
bullet3 test inputs (handshake) signals (2 level and 1 edge sensitive input)
bulletField 1 and Field 2 control signals
bulletProgrammable cell delay (from 1 to 64K clocks)
bulletProgrammable timeout (from 1 to 32K clocks)
bullet3 Programmable sync signals
bullet SEQUENCE DEFINITION
bulletProgrammable idle sequence
bulletProgram from 1 to 16 sequences where each sequence . . .
bulletSelects one of the sixteen timing sets
bulletSelects a data table
bulletSelects a loop count from 1 to 64K (or continuous)
bulletZero time delay between timing sets, data tables and sequences
bulletSingle cycle (all sequences) or continuous
bullet24 PROGRAMMABLE SET / SENSE SIGNALS
bulletMACRO COMMANDS
bulletUUT RAM and ROM Test
bulletLearn CRC's from input data tables & serial data channels
bulletCompare response tables to expect tables
bulletAlgorithmic fill and copy (data tables and timing sets)

 

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WORD GENERATOR

The word generator mode of the Model BE-64 incorporates the following features.64 I/O channels x 32K bits/channel, 25 Mhz data rates, Tri state output control 32 I/O channels x 64K bits/channel, 50 Mhz data rates. The 32K memories are software allocated into tables. Up to 32K tables may be defined. Table length is programmed from 1 word to 32K words. Each table may be looped from 1 to 64K times, or run in continuous mode. Up to 16 tables can be hardware linked together, generating zero dead time between tables. Continuous operation of an "Idle" table which can run while downloading new data. Each table can be input or output.

LOGIC RECORDER

The BE-64 can be programmed to record up to 64 channels by 32K/channel.

STIMULUS/RESPONSE TESTING

For test applications where test vectors are available, the Model BE-64 can be programmed to transmit or receive 64 channels by 32K bits per channel at frequencies to 25 Mhz.

BUS STRUCTURED INTERFACE SIMULATION

Bus structured interfaces are simulated exactly like the bus structured interface of a microprocessor. The architecture of the BE-64 has enabled Talon customers to simulate well over 1000 different digital interfaces. These interfaces range from a serial T2 communication interface to a high speed VME bus structured interface. Talon offers "set up" configurations for the following bus structured interfaces.

VME bus, VXI bus, Multibus, AT bus, NuBus, SCSI bus, Microchannel, EISA bus, S bus

NON BUS STRUCTURED INTERFACE SIMULATION

The Model BE-64 word generator model allows the simulation of almost any user defined digital interface.

MICROPROCESSOR BUS EMULATION

The Model BE-64 can be programmed to simulate the bus structured interface of any microprocessor incorporating an address and data bus, each bus not exceeding 32 bits in width. All timing and control signals are simulated, generating bus cycles to 50 Mhz.

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BLOCK DIAGRAM/SPECIFICATIONS

bullet64 I/O Chans x 32K bits/chan (maximum data rate - 25 Mhz)
bullet12 Output Programmable Timing and Control Signals; maximum output rate = 50 Mhz
bullet3 Input Programmable Timing and Control Signals; maximum input rate - 50 Mhz
bullet6 Input External Field Control Signals; maximum input rate - 25 Mhz
bullet24 Programmed I/O Signals; data rate defined by transfer rate of controller.
bullet30 miscellaneous timing and control signals required for exact simulation of various microprocessors and compatible signals for parallel to serial word generator converter card.
bullet1 Clock Out; frequency = 50 Mhz, 20 Mhz, or 10 Mhz
bullet1 Clock Input; maximum frequency = 50 Mhz
bulletAll signals TTL compatible.

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Last updated on 02/15/08